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Contents
Atmel FPGA Integrated Development System (IDS) contains the following items:
? IDS Installation Guide
? CD-ROM containing all necessary software and online documents
Features
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Support for Industry-standard PC and Workstation Tools
Schematic, PLD, Verilog ? and VHDL Design Entry Supported
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Macro Libraries for AT40K/AT40KAL and AT6000 FPGA Families
Automatic Macro Generators for AT40K and AT6000
HDL Planner for VHDL and Verilog Entry
Hierarchy Browser
User Library Management
Technology Mapping
Multi-chip Partitioning
Floor Planning Capability
Graphical Constraint Entry
Incremental Design Change
Timing Driven Design with Advanced Static Timing Analysis
Automatic Place and Route
Interactive Layout Editing
Power Calculation
Full Back-annotation for Functional and Post-layout Simulation
Online Tutorials for New and Advanced Users
Applications Support
FPGA Applications Hotline - (408) 436-4119 or fpga@atmel.com
FAQ and Application Notes at http://www.atmel.com/atmel/products/prod3.htm
Maintenance
Software Support for One Month is Included
Atmel FPGA
Integrated
Development
System (IDS)
Description
Atmel’s Integrated Development System (IDS) lets designers create fast, predictable
designs with AT40K/AT40KAL and AT6000 Series FPGAs.
Available for use with Windows ? 98/2000, Windows NT ? and Sun Solaris ? /SunOS
UNIX Workstation-based computers, IDS combines industry-standard software for
design entry, synthesis and simulation with Atmel ’s proprietary software
for component generation, automatic and interactive placement and routing, timing
analysis and bitstream generation.
The IDS Desktop is shown in Figure 1. The Design Flow Bar provides push-button
access to all the steps in the design flow. This includes opening schematic entry and
synthesis tools and generating files for simulations automatically.
Figure 2 shows the HDL Planner tool which is used for VHDL and Verilog Design
Entry. Figure 3 shows the Macro Generator used to generate standard components
with optimal layout and performance.
Rev. 1421D–06/01
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